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Per area efficiency vs. big core - yea, that must be far more efficient for MT apps. And we also don't know how power efficient each is, as far as how much power per performance. I think Intel is advertising this metric to be also quite favorable to small cores..
Remember the hint that Intel might roll out a big.LITTLE device with like 32 little cores? I thought that was an error in the article, but I can see how that might be an OK design.
Kind of hard to tell how things look outside of Cinebench, in cross section of benchmarks and applications. But if they get the scheduling to work perfectly, it might be a good approach.
Us AMD investors need to watch this one carefully. Its one of the few arch features that Intel currently has that AMD doesn't have, and does not appear to have on the near term roadmap. That and the question of whether Intel tries to jump ahead of AMD at TSMC for 3nm.
On wonders if Lisa as V-cache ready to roll in late Oct when Intel is rumored to debut Alder Lake. Would be a nice touch if she rolled it out then, at least if needed.
One other thing in the video, Daniel mentioned that the lead times are shrinking for AMD and growing for Intel. I am not sure if he was talking about wafers or CPUs, server CPUs in particular. Because there were some anecdotal takes that Milan lead time is up to 20 weeks.
So if this is shrinking, that would be great news.
Overall, since AMD is able to devote more capacity to GPUs, and GPUs are on the lower end of margin dollars per silicon die area, I think the capacity additions from TSMC are continuing even during these tough 2 quarters Q3, Q4)
They have GPUs going into mobile SoCs at Samsung. But Samsung has little footprint outside of themselves, whereas MediaTek does. If there is anything to this rumor, I suspect its about GPUs for MediaTek.
Which makes me wonder what if any limitations AMD had in order to land Samsung.
If AMD can get MediaTek, that basically leaves Qualcomm as the only big provider that would not be on AMD GPUs, other than captive Apple.