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   Technology StocksAdvanced Micro Devices - Moderated (AMD)


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To: dougSF30 who wrote (219059)12/5/2006 3:49:16 PM
From: eracer
of 275869
 
Re: OMG, if that is true, AMD is done like dinner.

On the other hand this would put AMD's simulated benchmarks in a somewhat more positive light if they were simulations at 2.5GHz instead of 2.9GHz. A 2.9GHz Barcelona barely outperforming a 2.67GHz Clovertown in the online transaction benchmark would look really poor, where a 2.5GHz Barcelona at least indicates a slight clock-for-clock performance edge over Clovertown/Kentsfield.

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To: mas_ who wrote (219067)12/5/2006 3:51:36 PM
From: dougSF30
of 275869
 
Not sure how you are still posting here, but:

I think the fact that SiGe is included is a negative, because I would've expected improvement from adding it in the future. I was quite surprised to find that it was already in.

This together with the HKEPC Barcelona top clock of 2.5GHz says something is quite wrong, IMO.

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To: jspeed who wrote (219049)12/5/2006 3:51:44 PM
From: smooth2o
of 275869
 
re: Half baked...

It's not half baked. This "Seal of Approval" comes out ONE DAY after the 65nm announcement with

1. No apparent availability
2. Yielding maybe equal (or better) to 90nm
3. Late, very late
4. Same or less performance
5. WAYYY lower performance than the closest competitor

Name some reasons why you think it's not "paid for".

Smooth

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To: FJB who wrote (219066)12/5/2006 3:52:27 PM
From: dougSF30
of 275869
 
Could I ask you to take content-free OT posts like this to the OT board, or PM me?

I am not 2X anything, as there is currently no "speed limit".

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To: eracer who wrote (219068)12/5/2006 3:53:48 PM
From: dougSF30
of 275869
 
There is that, but given that those simulated benchmarks were cherry-picked, I imagine this does not bode well for other benchmarks, particularly integer stuff. Just one rumor site making the claim at this point, I guess.

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To: dougSF30 who wrote (219064)12/5/2006 3:55:06 PM
From: jspeed
of 275869
 
Who would you prefer AMD go to? Benchmarkers like Tom's HW and Anandtech? That's like saying a car company should take their car to a local garage for a recommendation instead of J.D. Power & Assoc.

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To: jspeed who wrote (219073)12/5/2006 3:59:16 PM
From: dougSF30
of 275869
 
I would expect AMD to release a die photo to the media, and update their public docs available on their website to contain 65nm die size information, like they did for 90nm parts. I would expect them to provide samples to the usual review sites.

Correct me if I am wrong, but I do not believe their hired folks performed overclocking tests. Certainly they have not made them public, to my knowledge.

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To: dougSF30 who wrote (219074)12/5/2006 4:05:10 PM
From: FJB
of 275869
 
I would expect them to provide samples to the usual review sites.

Have you lost it? This is the exact same chip they have been shipping for almost two years, except with different power characteristics.

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To: kpf who wrote (219055)12/5/2006 4:06:26 PM
From: Elmer Phud
of 275869
 
kpf

I don't see why. All else being equal, for a reasonable approximation to yields I'd suggest rather to look at transistorcount than diesize.

Not necessarily so. Die size is a much better predictor within a reasonable range of cache sizes and it includes the size taken by redundancy.

because designs for manufacturability compensate for the above by means of more redundancy for higher transistorcounts.
Edit: Synopsis: For a given design adding redundancy obviously increases diesize and yield. :)


You talk redundancy but you didn't mention cache where it's used. Yes, that will lift yield but at a price. The amount of redundancy you add takes up die size too. There's no reason to add more than you reasonably need, which gets us back to defect density. The lower the DD, the less redundancy you need to add so the lower the die size and the higher the yield. Which makes one wonder if it's related to why AMD reduced the cache size....

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From: FJB12/5/2006 4:14:26 PM
of 275869
 
Qualcomm aims to rival Intel in laptop connectivity


Mike Clendenin
(12/05/2006 7:03 AM EST)
URL: eetimes.com

HONG KONG — Qualcomm Inc laid the ground work for a technology smack down with Intel Corp on Tuesday, saying it would use the recent acquisition of Airgo Networks to invade the connectivity space for laptop PCs and other non-phone portable devices. It also floated another taunt by suggesting its 1GHz Snapdragon platform would be a real nuisance to the PC microprocessor giant.
"Laptop computing is not a niche for us. It is a big and growing area. We not only look at laptops, but sub-notebooks, ultra mobile PCs, Smartphones, wireless PDAs — that whole category of devices where Intel plays today is a great opportunity for us," said Luis Pineda, senior vice president of marketing and product management for Qualcomm CDMA Technologies.


...

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