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   Technology StocksAdvanced Micro Devices - Moderated (AMD)


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To: Joe NYC who wrote (218916)12/5/2006 1:56:48 PM
From: smooth2o
of 275872
 
I don't know why, HR has stated 30% MS as a goal...

Smooth

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To: plantlife who wrote (218981)12/5/2006 1:58:43 PM
From: justaview
of 275872
 
There is nothing new in Rev. G except for 100MHz speed increments. C1E has been in 90nm. Just check Turion data sheets.

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To: dougSF30 who wrote (218989)12/5/2006 2:01:20 PM
From: rzborusa
of 275872
 
Doug, I don't think there would be a constant. Given that the width of the kerf area shouldn't change, also a smaller dice has proportionately larger perimeter.

In edit, Maybe I just don't realize how narrow theboundry or border is.

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To: justaview who wrote (218993)12/5/2006 2:01:39 PM
From: dougSF30
of 275872
 
Maybe the extra die area is all dark matter?

:) :) :)

Or wait, I know, maybe each Brisbane has a tiny driveway on the die, for Henri to park his little toy Ferraris?

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To: dougSF30 who wrote (218991)12/5/2006 2:04:11 PM
From: Sarmad Y. Hermiz
of 275872
 
doug, thanks. It looks really bad to me. But the stock is up. So maybe it is not true.

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To: rzborusa who wrote (218994)12/5/2006 2:05:06 PM
From: dougSF30
of 275872
 
I suppose a small increase over time, but I don't think that would be *nearly* enough to account for what we are seeing, if the Inq is correct.

A .66 to .70 shrink factor, sucks, frankly.

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To: dougSF30 who wrote (218990)12/5/2006 2:05:53 PM
From: Joe NYC
of 275872
 
Doug,

I don't believe that AMD would decide to blow up the die from 105mm^2 to 125mm^2 to save 7W at idle.

If that is indeed the tradeoff, it certainly would make sense to go with larger die, lower idle power for notebooks...

Joe

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To: Sarmad Y. Hermiz who wrote (218996)12/5/2006 2:07:16 PM
From: dougSF30
of 275872
 
Sarmad, I doubt many traders at all even understand this. They certainly won't react until some mainstreamish article comes out about it.

Also, to be fair, this is only the Inq at this point.

Although AMD does seem to be trying to keep die photos and the die size a secret, so far.

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To: dougSF30 who wrote (218968)12/5/2006 2:08:49 PM
From: Rink
of 275872
 
Remember this Intel 45nm + high-k slip?


realworldtech.com

Yes immersion is a risk. Still it's about the less riskiest from all new technologies from what I read. ASML 40nm immersion technology became available for sale this July; iirc this was about their 5th gen immersion product.

AMD/IBM had to make their 45nm choice during this summer, only slightly after Intel had to settle for their backup plan. Although I haven't read what choice AMD/IBM finally made every article presumes it's immersion (their first choice).

So what exactly are you basing your doubt on, gut feel alone? You can be right, but then again you have not even the slightest bit of hard data to doubt if immersion will slow 45nm beyond what AMD projected. Right?

Regards,

Rink

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To: dougSF30 who wrote (218999)12/5/2006 2:12:48 PM
From: plantlife
of 275872
 
I don't think AMD would publish a 65nm spec process if it wasn't true. Don't think it would be legal. For whatever factor is changing the ratio, if it indeed really exists, I think we must look elsewhere.

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