SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

   Technology StocksAdvanced Micro Devices - Moderated (AMD)


Previous 10 Next 10 
To: pgerassi who wrote (218639)12/2/2006 2:44:16 PM
From: plantlife
of 275872
 
So, is this HT 3.0 On Chip Horus?

Share KeepReplyMark as Last ReadRead Replies (1)


From: jjayxxxx12/2/2006 2:46:19 PM
of 275872
 
As a long time reader of the Mod. AMD thread and a contributor to the thread by hosting the EPS contest and all of the other archived data on the contest website, I have something to say...

Message 23064359

Please DO NOT reply to this post with anything off topic. If you wish to reply, do so at the above linked post.

Regards,

JJ

Share KeepReplyMark as Last Read


To: mas_ who wrote (218638)12/2/2006 2:47:41 PM
From: Elmer Phud
of 275872
 
mas,

You're trying to draw me into the same kind of argument you're having with Doug. I'm not that stubborn so if it get you to stop then yes, I completely agree with everything you say about everything, in the past, now and in the future.

Share KeepReplyMark as Last Read


To: plantlife who wrote (218640)12/2/2006 3:08:12 PM
From: pgerassi
of 275872
 
Dear Plantlife:

HT 3.0 is the next version of hypertransport. It includes HT clocks to 2.6GHz (41.6GB/s on a 32/32 HT link), the capability to split a HT link into two smaller sub links, can be used as a up to 1 meter long capacitively coupled link for chassis interconnect, can be put to sleep and woken up, can change speeds dynamically and be hot plugged (inserted and removed while the system is running).

For further information check:
hypertransport.org

Pete

Share KeepReplyMark as Last Read


To: pgerassi who wrote (218506)12/2/2006 3:11:40 PM
From: Joe NYC
of 275872
 
Pete,

I would pay for good content, but I refuse to pay more than once for something.

Yeah. When a new version comes out, you should be required to just pay for the media, not for the use of intellectual property that you already paid for. Also, if kids scratch the CD or DVD, it should not mean that the use of intellectual property is "revoked", and you have to pay again.

Some think that with the internet, copyright itself should be abandoned as new knowledge is made freely and everyone can copy it. Other means should be made for compensation for the creators.

What do you mean by this? You want some commissar awarding compensation?

Joe

Share KeepReplyMark as Last ReadRead Replies (1)


To: dougSF30 who wrote (218514)12/2/2006 3:24:48 PM
From: Joe NYC
of 275872
 
Doug,

16.8 mm x 18 mm = 302 mm^2

That's a big chip.


It is not that big for servers and high end desktop. However, DC version of it, which should be some 60% to 65% of it seems a bit on the high side, and not much smaller than current DC chips on 90nm. Something soes not seem to add up.

Joe

Share KeepReplyMark as Last ReadRead Replies (1)


To: Joe NYC who wrote (218645)12/2/2006 3:26:08 PM
From: dougSF30
of 275872
 
It is not that big for servers and high end desktop.

Why do you say that?

Share KeepReplyMark as Last ReadRead Replies (1)


To: mas_ who wrote (218630)12/2/2006 3:29:57 PM
From: dougSF30
of 275872
 
also the technical difference between 45nm and 65nm wil be less than 65nm to 90nm

Links for this, please?

By the time K8L comes out 4-core Tigerton MP will be here.

I actually agree with you on this one. I think Intel is going to pull in Tigerton/Caneland from current official schedule.

Share KeepReplyMark as Last ReadRead Replies (1)


To: Rink who wrote (218633)12/2/2006 3:31:42 PM
From: dougSF30
of 275872
 
I thought there were to be no insults to other posters, period? When did that change, is what I'm asking.

Share KeepReplyMark as Last ReadRead Replies (1)


To: dougSF30 who wrote (218525)12/2/2006 3:34:38 PM
From: Joe NYC
of 275872
 
Doug,

I think the analog / I/O portions of the chip don't scale down as readily as core and cache. So shrinking of the 65nm chips (Rev G) will be less than ideal. But 100 mm^2 (the higher end) for mainstream parts is just fine. There will also be SC low end parts, that will be smaller.

Joe

Share KeepReplyMark as Last ReadRead Replies (1)
Previous 10 Next 10