|Fantastic find. Quite a bit of interesting information about the state of 200mm wafers. Am I correct in assuming that these wafers are from II-VI?|
Overall, it appears that they are making progress on wafer quality but definitely have work to do on epi. Yields are obviously a wild card. =
Does anyone know if 150mm wafers were thicker at the start of the rampup and then got thinner?
This link has the latest STM 200mm wafer quality report. Previous report said that thickness was in order to get warp and bow within spec. This report mentions both are within the final spec but doesn't mention if they will try for thinner wafers as a result.
I started digging around and came across this oled materials catalog from ~'13. My understanding is that SiC wafers are usually produced off-axis. I couldn't find any further information about the c vs. c1 specification, but it appears that Cree was producing 500um 150mm wafers at one point.
This article from Dow Corning talks quite a bit about the transition to 150mm SiC wafers. Ironically, since Cree is keeping the 200mm wafers in-house, this would actually hurt them until they started selling 200mm wafers.
Control of the shape and flatness
Together with the reduction of extended defects, it is important to optimize the shape of the wafers via optimized crystal growth, wafering, and polishing processes. This has been specifically challenging for the 150 mm SiC substrates as the thickness of the substrates (350 µm) has been kept identical while switching from the 100 mm wafers to the 150 mm diameter. This constraint is different from what has occurred in the Silicon technology where the wafer thickness increases together with the expansion of the diameter. Maintaining thickness while increasing diameter brings additional crystal stress control requirements for 150 mm SiC.