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From: BeenRetired12/31/2017 10:35:06 AM
   of 6432

Copper good to 5nm? After? Cobalt and more exotics..............................................................

the sheeple will bite, for the umpteenth time, when the shills and sponsored "expert" scream The Wall has been hit*.

I'll stick with the actual truth about history repeating.


Aveni extends copper interconnects to 5nm and below for BEOL integration
Rodney Chan, DIGITIMES, Taipei
Thursday 28 December 2017
Aveni, a developer and manufacturer of wet deposition technologies and chemistries for 2D interconnects and 3D through silicon via packaging, has announced it has obtained results that support the continued use of copper in the back end of line (BEOL) for advanced interconnects, at and beyond the 5nm technology node.

"In this 20th anniversary year of copper integration, our results validate the comments made by IBM Research Fellow Dan Edelstein in his keynote presentation at the recent IEEE Nanotechnology Symposium, discussing that copper integration is here to stay," noted Bruno Morel, Aveni CEO.

As devices inevitably continue to shrink to meet and create market demand, designers are exploring alternative integration schemes, not only for the front end of line, but also the BEOL. This includes, most notably, replacing the copper in dual-damascene interconnects, to compensate for the increased resistance-capacitance (RC) delay that accompanies the thinner copper wires and adversely affects device speed. Proposed replacement options for copper are cobalt, the most likely candidate, or more exotic materials like ruthenium, graphene or carbon nanotubes.

Advanced dual-damascene structures employ an atomic layer deposition tantalum nitride (TaN) copper diffusion barrier, a thin chemical vapor deposition (CVD) cobalt liner, and the electroplated copper fill layer, which makes up most of the wiring. Earlier generations (7nm and larger nodes) also use a physical vapor deposition (PVD) copper seed layer between the cobalt and copper fill, but advanced devices are phasing out this film due to marginal seed coverage and integration hurdles.

Of particular interest is the thin TaN barrier, which prevents copper from diffusing into and poisoning the device. The integrity of the thin cobalt liner (on top of TaN) is critical to ensuring that the barrier functions properly. The reduced thickness of cobalt liners for the 5nm technology node is approaching 3nm, reducing process flexibility for conventional approaches to copper plating.

In a recent study, Aveni compared its Sao alkaline-based copper electroplating chemistry performance with a conventional, commercially available acidic copper plating chemistry. The samples to be plated were 3nm CVD cobalt over TaN. The study results showed that the acidic copper chemistry attacked the cobalt liner, causing the plating chemistry to react with the underlying TaN film and form tantalum oxide (TaOx), according to the company. TaOx formation is another failure mode of devices, because it creates an effective open circuit that prevents current flow.

With Aveni's Sao chemistry, the cobalt remained intact and TaOx was not formed, which enables the extension of copper interconnects to process nodes at 5nm and below, the company said.

Frederic Raynal, chief technical officer at aveni, commented, "We were extremely excited about these results, because they substantiate our position that Sao alkaline-based chemistry for copper electroplating is superior to acidic chemistries, especially with the thinner cobalt liners used in advanced nodes."

*The Man Who Said IC R&D Was ‘Nearly Over’

In the 1950s, Tsugio Makimoto, was sent by his employer, Hitachi, to pursue graduate research at Stanford.

“Hitachi had a programme to send 10 people to US universities for studying”, recalls Makimoto, “and I was selected as one them.”

“I chose Stanford because there were many shining stars of the semiconductor industry there.”

“While I was there I went to the ISSCC and Jack Kilby gave a presentation saying that the time for doing research into ICs was nearly over.”

“This was a big shock to me”, says Makimoto, “because I was at Stanford to do research into ICs.”

Nonetheless, Makimoto completed his research, then returned to Japan and wrote a report for his boss suggesting that Hitachi invest heavily in research into germanium ICs.

The boss accepted Makimoto’s suggestion and put Makimoto in charge of the research.

The research turned into the basis for Hitachi growing its semiconductor business to one of the world top 10 semiconductor companies with Makimoto becoming CEO.
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