Chip Makers Mull Plans to Insert DSA at 14nm
By Mark LaPedus and David Lammers
semimd.com 
Faced with the dreaded multi-patterning era and delays with extreme ultraviolet (EUV) lithography, chip makers are taking a harder look at a technology that could save the day for the industry: directed self-assembly (DSA). In fact, several IC vendors are mulling plans to implement DSA at the 14nm node or so — an insertion point that is sooner than previously thought, according to one DSA materials supplier.
For some time, there has been a consensus that the IC industry would use 193nm lithography and multi-patterning at 14nm. Then, at 10nm, the IC industry could go with several options: EUV, maskless, multi-patterning or nano-imprint.
Used in conjunction with today’s 193nm lithography scanners, DSA has also been seen as a possible candidate for IC production at the 10nm node. DSA — an alternative patterning technology that makes use of block copolymers — could also turn the IC industry upside down. It could extend 193nm wavelength lithography beyond 10nm, potentially eliminate expensive multi-patterning steps, and possibly push out EUV.
In one example of its enormous potential, DSA, along with 193nm immersion lithography, has demonstrated the ability to print lines and spaces down to 12.5nm — without the need for multi-patterning, said Christopher Bencher, a member of the technical staff at Applied Materials Inc., in a recent interview.
“Some predictions play it safe and target the 10nm node” for DSA, said Ralph Dammel, chief technology officer (CTO) for AZ Electronic Materials, a supplier of materials for DSA and other applications. “However, we see a lot of customer interest for insertion already at 14nm and even higher nodes,” Dammel said. “Teams have been assigned at major customers, not just to study the potential of DSA, but to ready it for near term insertion. My best guess is that we will see some penetration of DSA by 2013/14, and that at the 10nm node, it will become pervasive.”
 The early DSA programs among some undisclosed chip makers are expected to kick off this August, which is geared for the 14nm node in the 2015 time frame, he said.
But current block copolymers based on today’s poly(MMA-co-styrene) technology could hit the wall somewhere between 14nm to 10nm. As a result, there is a wave of research to find new copolymers that could extend the technology to 10nm and beyond.
AZ Electronic, Dow, JSR, SEH, TOK and others are racing each other to develop next-generation DSA materials. AZ Electronic, which claims to be the leader in DSA materials, is expected to disclose its new results with the technology at the Semicon China trade show in Shanghai from March 20-22.
DSA is capturing the imagination of the IC industry, but experts are quick to point out that the technology faces some challenges and there is a major debate when it will be ready for prime time. Moshe Preil, manager of emerging lithography and tools at GlobalFoundries Inc., said the industry has taken a “more serious and harder look” at DSA since the SPIE Advanced Lithography event in February. At SPIE, there were several troubling disclosures, namely that EUV and the associated power sources are still far behind the curve.
Preil, who runs the DSA program at GlobalFoundries, stopped short of saying that DSA will be inserted at the 14nm node. The insertion point largely depends upon the progress with the technology, he said.
During a panel session at this week’s Common Platform Technology Forum 2012 in Santa Clara, Calif., T.C. Chen, IBM Fellow and vice president of science and technology at IBM Research, said: “DSA is coming in pretty soon for critical levels. Triple patterning is not really economically feasible.”
During another session at the same event, Lars Liebmann, distinguished engineer at IBM, had a different view, saying that adding “one more mask layer to a complex mask set” for triple patterning is not going to stop companies from going that route if they need it to pattern the critical layers.
Liebmann said DSA could be used at the 10nm node to “make the gratings, which could then be cut with an e-beam. It is not an option for 14nm; it just won’t be ready in time.”
DSA — Next big thing?
Still, GlobalFoundries, Hynix, IBM, Intel, Micron, Samsung, TSMC and others have begun to take DSA more seriously – and for good reason. EUV lithography is late. Maskless and nano-imprint lithography are also not ready.
So, leading-edge chip makers must continue to use today’s 193nm immersion lithography tools for advanced chip production, but they are also forced to implement expensive multi-patterning steps. “Multi-patterning will be here for some time — at least for two more nodes,” said Michael White, director of product marketing for Calibre Physical Verification at Mentor Graphics Corp.
For 20nm, the industry must embrace double-pattering in one form or another. “Triple-patterning will not happen at 20nm,” White said at the Common Platform event. “It’s one of the options for customers at 14nm.”
EUV is largely required because it brings the industry back to single-exposure technology. But if EUV misses its target window at 14nm and emerges at 10nm, White sketched out a troubling scenario: At 10nm or beyond, the industry may end up using EUV and double-patterning simultaneously.
As a result, many hope DSA can save the day. In 2007, DSA landed on the International Technology Roadmap for Semiconductors (ITRS) roadmap as a potential solution for lithography at the 10nm node.
 IBM's DSA process flow (Source: AZ Electronic)
DSA is not a next-generation lithography (NGL) tool, but it is actually a “complementary” technology. DSA is an alternative patterning technology that enables frequency multiplication through the use of block copolymers. When used in conjunction with an appropriate pre-pattern that directs the orientation for patterning, DSA can reduce the pitch of the final printed structure.
At SPIE, Applied’s Bencher said defectivity, registration and other issues remain some of the key challenges to move DSA into production. DSA is ideal for dense contacts, Fin patterning and other applications, he said.
AZ Electronic, IBM, the University of Wisconsin and others have separately developed rival DSA “process flows” for chip production. IMEC has recently announced the implementation of the world’s first 300mm fab-compatible DSA process line.
Saving the day
Mukesh Khare, director of semiconductor technology research at IBM Research, said some people refer to DSA as “pitch in a bottle.” He himself referred to DSA as “polymer self-assembly” and said IBM has been working on polymers for quite a long time.
Khare said DSA has already been used to produce 25nm line and spaces with good line-edge roughness, using immersion tools. “Lithography defined directing patterns” are capable of 10nm resolution, he said at a session during the Common Platform event. The work is very encouraging, he added, with “defectivity similar to when we first started to play around with immersion lithography.”
 (Source: AZ Electronic)
The polymers include materials with much different molecular weights, which separate at various phases. “We are trying to determine the self-assembly morphology,” he added.
DSA is “like the early days of immersion lithography, when there was a similar feeling of exhilaration,” said AZ Electronic’s Dammel. “I won’t go as far yet as to predict that EUV will share the fate of 157nm lithography. But clearly, DSA is on its way to becoming a mainstream, low cost lithography option.”
In 2010, Luxembourg-based AZ Electronic signed an agreement with IBM to co-develop DSA technology. IBM also has a separate deal with JSR Corp. in the arena.
At Semicon China, AZ Electronic will announce that it can reproduce “synthesize performing block copolymers with half-pitch at 10.5nm to 31nm” (See images below). The company said it has completed the first stage of materials learning and samples are ready for ”in-fab process learning.” The company’s block copolymers supports AZ’s own process flow as well as those from IBM and the University of Wisconsin.
 AZ tips its own process flow for DSA (Source: Company)
“By late 2011, we had achieved this target,” Dammel said. “IMEC has received materials for all of these flows for use in their DSA pilot line, and we are currently the only supplier who is able to provide gallon samples to them. These samples are low metal, properly filtered, lithographically tested for DSA performance, and meet all requirements for IC production. We now stand ready to provide these materials in quantities for process learning and production insertion, and I think no one else can say that at present.”
Now, the trick is to move DSA from the lab to the fab at or around 14nm. Then, current polymer technology could hit the wall, fueling a new wave of R&D for next-generation materials. “For 10nm, p(MMA-co-styrene) block polymer is no longer a suitable material,” he said. “Its low chi factor implies that a high MW is needed to obtain phase separation, and since MW is related to domain size, the lowest line/space structures that can reliably be made are (about) 11nm.”
AZ and others are developing higher chi materials for 10nm node and below. “With these materials, it will be easily possible to extend DSA to the 8nm node, using guide structures made by immersion lithography using the trick of putting more than one polymer stripe to the guide structure,” he said.
There are a number of promising leads for the newfangled polymer. For example, the University of Queensland in Australia is developing a new class of diblock copolymers called PS-b-PDLA. With PS-b-PDLA, “8nm node type features (are) possible,” he said.
There are at least two tool options for 8nm: 193nm lithography and DSA and/or EUV and DSA. “We may see a co-existence between EUV and DSA,” he said. “But if EUV up and dies, the world doesn’t end.”
 AZ shows images using DSA (Source: Company) |
