ACIA CC: 1.2TB AC1200 sales ramp 4Q17......................Wow.................................
"form factor that is 40% smaller than the competitive 5 by 7 modules that support 400 gigabits per second."
In chips, we just love enablers.
Hyper-scale customers are looking to increase capacity while reducing size, cost and power consumption per 100 gig. Our AC1200 coherent module, which supports 1.2 terabits per second using 2 wavelengths of 600 gigabits per second each, is well-suited for these requirements. By increasing the capacity per wavelength, we are reducing cost and power consumption per 100G. By using our Silicon Photonic PIC and low-power DSP ASIC, we're able to offer this solution in a form factor that is 40% smaller than the competitive 5 by 7 modules that support 400 gigabits per second.
In addition, the AC1200 is based on our Pico DSP ASIC, which supports several advanced features that can enable a new level of software-defined networking. These features include tunable baud rate, our patented fractional QAM modulation and enhanced turbo product code FEC. We believe the combination of features, cost, performance, integration and low power consumption will make our AC1200 well-suited for a variety of cloud and carrier applications.
Customer qualification of our standalone PIC is also progressing. We anticipate sales for this product to begin ramp in the fourth quarter of 2017 as customers conclude their qualification and testing cycles. As discussed during our second quarter earnings call, we are seeing our silicon PICs with their small footprint and low power consumption displacing legacy optical components in some of our customers' coherent designs. As such, we believe the sale of our standalone PICs will help to expand the size of our addressable market.